Efabless Corporation

All Bay Area Students: There is a contest to make your own IC using open-source tools. The cost is free. The contest is to build a sound and graphics demo in less than 161 x 225 microns of 130nm ASIC ( https://lnkd.in/dpp74szQ ) I have some tutorials (Te tiny Tape out site has great materials as well.): https://lnkd.in/dAhMRZhB https://lnkd.in/dAhMRZhB  If you are a local student who is interested, please fill out this form so I can help you create groups during the break. For equipment, all you need is a computer. https://lnkd.in/dqcpNA-s  This can be the start of a Senior Project.  Please note that this is a worldwide contest run by Tiny Tapeout; anyone can enter. I am just trying to form local groups.

Greetings ! conntections , Today i am excited to share that I have successfully performed the RTL to GDSII flow of the earlier Floating Point Multiplier Project in Openlane (an open-source tool) . I am very proud of my results and growth in the past few months. This project makes me feel complete and motivated to get to know and learn EDA tools like Cadence Genus , Innovus and more. I had designed the RTL description of FP Multiplier in AMD Xilinx Vivado and veriefied the funtionality by simulation. Then i imported the verilog file , constraints file to Openlane running in Linux. I had perfromed each step of the Physical Design individually and gathered some amazing results. After running OpenLane, the final chip utilized 3,949 standard cells, 3,922 wires, consumed 131uW of power, and occupied 32,187 μm² of area. I had utilized Klayout to view the GDS and Openroad to view the ODB files (Placement , Routing). The beautiful view of GDS had me staring at it for 5 mins after finally completing it. Thank to Zero to ASIC channel on Youtube. Looking forward to develop more designs and perfrom RTL to GDSII flow in Openlane and hopefully submit my best design to TinyTapeout Matt Venn. I encourage everyone who's interested in ASIC , Digital Design to look into Openlane by The OpenROAD Project and Efabless Corporation and contribute to democratisation of EDA tools. #VLSI #Semiconductors #EDA #Openlane #TinyTapeout #Chipdeisgn

It’s become a cliche, but hardware is hard! One reason why hardware is harder than software is that the time between revisions is often longer. We need to wait for new PCBs, or for components to be delivered. Or for more new PCBs after we realise we got it wrong! Another reason is that it can be expensive, and not just for the physical components. We generally need more of a lab than software developers. Not just soldering irons and good lighting. Test gear is essential for learning how your circuit is actually behaving, matching simulation to the real world. And it’s usually expensive. I struggled with the cost of hardware development for years, and when someone donated me my first oscilloscope it was a big deal! Seeing the waveforms really helped me to advance my understanding and the complexity of the projects I could undertake. To help others progress, I’m going to award several Christmas test gear grants. If you’re interested, apply here: https://lnkd.in/d3a778pZ

I just verified my twin tee oscillator in silicon! This design was fabbed on Tiny Tapeout 7, which we just received from Efabless Corporation https://lnkd.in/dMwxmHsT This design uses a 'twin tee' filter in the feedback loop of an opamp. It was simulated to oscillate at 4.93MHz but I measured 4.67MHz - about 5% slower. Pretty close! Thanks to Alan Wolke (W2AEW) for the inspiration, Sai for the opamp design and Pat Deegan, KSC for the opamp layout. It was cool being able to reuse the open source silicon IP that other people have made! If you want to learn how to make your own custom chips, check out my courses here: https://lnkd.in/d-wSAgxi #ASIC #opensource #silicon #oscillator #verified

At the beginning of this year, my knowledge of analog integrated circuits was almost nonexistent. However, my passion for learning more about this fascinating field drove me to embark on an intense journey of discovery. During the first three months, I was fortunate to have an amazing mentor, Guilebaldo G., who was instrumental in guiding me through the basics. His support helped me take my first steps in this world. A few months ago, I shared an ADC and DAC that I designed in LTSpice, excited to explore the fundamentals. Today, I’m thrilled to showcase a more significant achievement: the integration of my DAC design using SkyWater's 130 nm technology. This milestone wouldn’t have been possible without the invaluable support of Efabless Corporation, a company that has been key to my learning and development in integrated circuit design. I’m excited to continue growing in this field and contributing to the democratization of hardware design. I’m deeply grateful to everyone who has supported me on this journey, and I hope this small step inspires others to explore the exciting world of semiconductors. #AnalogDesign #Semiconductors #SkyWater130nm #Efabless #LearningJourney #OpenSource