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As chip designers try to fit more functionality within a small footprint, hybrid bonding technology is being developed that stacks multiple chips on top of each other within a single package. #packaging #chipdesign #hybridbonding https://lnkd.in/gkHrA3jE

I am a big fan of Open Architectures, Open Specifications, Open Standards. Hence we named our ASIC company Open-Silicon :). In other words, allowing collaboration between brilliant minds is the best way to create affordable and meaningful solutions that impact the daily lives of so many. Therefore, I believe, Open chipset ecosystems will allow for wider collaboration across semiconductor design and manufacturing and usher in a new era of innovation that will push Moore’s Law to a new dimension for years to come. Looking toward the future, we may soon see a dynamic where no semiconductor is manufactured in a single place, and instead, the ecosystem is far more globalized than it already is. #Semiconductor #SemiconductorEngineering #ChipletDesign

Siemens Veloce™ CS Hardware Assisted Verification family represents a significant generational jump on all metrics of note - Gate capacity, performance, debug, throughput, datacenter scalability, cost of ownership. Emulation – Veloce Strato CS Enterprise Prototyping – Veloce Primo CS Software Prototyping – Veloce proFPGA CS Read about how 3 new platforms provide the right and the best solutions for the various phases of SoC verification and validation. A dedicated solution for different problem/stage of chip validation, but being congruent like never before in the industry, so no more compromises. #emulation #eda #fpga #verification #prototyping #semiconductor #veloce #validation #shiftleft #socverification #systemvalidation #chipdesign #techinnovation #siemenseda #SemiEDA #hpc

My latest article on leveraging GenAI & LLMs for Semicon Chip designing. #smartsoc #genai #llm #soc #semicon

On the path to a chiplet based future... There are many twists and turns on the road to a future where we could pick chiplets from a catalogue and assemble them to the MDM (Multi-Die-Module) of our liking. At least that is my opinion. If you design all the dies yourself (HBM excluded), the future is already here, but that is not possible for every company, only the very large ones. At semiengineering I found this article that talks about some of the challenges that needs to be solved. I found it refreshing that it talks more about the challenges ahead, than the hype surrounding the chiplet discussions, Work is ongoing, it is likely only a question of an end date when solutions will emerge. https://lnkd.in/diFwbVZr But I also secretly hope that some company will be started that provides a balanced catalogue of generally useful dies, to be used in a MDM. Like a machine learning accelerator, a GPU, etc. And if these would be offered, and updated, to some mainstream technology nodes, and then maybe some of the issues with mixing dies from different technology nodes could be avoided and the road ahead maybe a little more straight? But who would gamble on such an investment? Who would be interested in purchasing and using these dies? #chiplet #mdm #soc #asic

🦸Unsung Heroes of Chip Design: Spare Cells In the world of chip design, there are unsung heroes that go unnoticed during the normal course of development: #Spare Cells These seemingly idle components—often tied off to ground or VDD—appear to serve no purpose. They don’t perform any logic. To the untrained eye, they’re just "empty" gates. But here's the twist: When it’s crunch time—when a critical bug arises in the final stages of chip development (the ECO cycle)—spare cells are the quiet saviors. What could’ve been a costly design overhaul (think $100K or more) could be resolved with a clever tweak using those spare cells, saving you both time and money. For example, if you need to add an AND gate but don’t want to redesign the whole chip, you can repurpose an existing spare AND cell. By re-routing and removing the tie-offs, you avoid regenerating base layer masks—saving you thousands of dollars and precious time. Spare cells might seem useless at first glance, but in the right moments, they prove their worth in ways that go far beyond their silent existence. Where have spare cells saved you during your career? Share your stories in the comments! #ChipDesign #Innovation #SpareCells #EngineeringExcellence #memelearning #meme #funlearning #ECO

Stacking multiple chips on top of each other within a single package is a way to increase functionality and manage space. Hybrid bonding allows for two chips to be stacked vertically. #packaging #chips #hybridbonding https://lnkd.in/gkHrA3jE

Curious about why future electronics designs might be chiplet-based? This article explores the shift toward chiplet technology, highlighting how it promises to drive technological advancements by allowing more flexible, scalable, and cost-efficient designs compared to traditional chip architectures. Discover the impact of chiplets on performance enhancements and industry adaptation in a post-Moore's Law era.

Hardware design has brought new innovations and improvements in performance, cost, size, power, and reliability.

Custom #ASIC: The Ultimate Guide 💡 Imagine a world where every #electronic device is tailored to its purpose with pinpoint precision. Custom ASICs, or Application-Specific Integrated Circuits, makes this a reality.   Custom #ASICs represent a step beyond generic circuitry to meet unique demands. They offer customization levels from the architecture to the very silicon upon which they’re built.   This article sets out to unveil the world of Custom ASICs, from their bespoke creation to the multitude of reasons why industries choose them. AnySilicon.com will define their costs and highlight the efficiency, expertise, and experience that go into their conception and production. A very big thank you again to AnySilicon.com for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/eNSJEKsU #semiconductorindustry #semiconductors #semiconductor #technology #tech #foundry #chip #chips #ic #icdesign #innovatin #engineering #it