Perfect gift for this #Christmas from AsFigo - super excited that our Director of Verification Ajeetha Kumari will be speaking at the upcoming #SOOCON25 #StateOfOpenCon event in London in Feb'25. Join us to learn how we enable #AI in #Chip #Design using #Opensource technologies such as #PySlint Thanks a lot OpenUK team for working hard towards this event! Merry #XMas and happy holidays to all!
AsFigo
Computers and Electronics Manufacturing
Enabling semiconductor chip design and verification through open-source innovations!
About us
Chip Design and Verification start-up out of London, backed by decades of international semiconductor industry experience. We at AsFigo strongly believe that open source is the key to propelling the next generation of chip design engineers. For instance, worldwide workspace development requires access to tools and technologies at everyone's fingertips - without complicated licenses, NDAs, compute infrastructure etc. For many start-ups in the AI space, access to opensource tools and libraries mean a lot to keep their costs in check. We also develop solutions such as PySlint - an innovative testbench static checking tool that's the industry's first opensource SystemVerilog Testbench linter.
- Website
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https://www.asfigo.com
External link for AsFigo
- Industry
- Computers and Electronics Manufacturing
- Company size
- 2-10 employees
- Headquarters
- London
- Type
- Privately Held
- Founded
- 2023
- Specialties
- UVM, SystemVerilog, Python, Lint, MathLib, Matlab, chip design, semiconductors, EDA, and VHDL
Locations
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Primary
Get directions
71-75 Shelton Street, Covent Garden
London, WC2H 9JQ, GB
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Get directions
Zurich, CH
Employees at AsFigo
Updates
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Friday should be used to automate mundane tasks so that you can have good weekend! Here is a #debug utility/app that we have recently opensourced as part of our verif_utils https://lnkd.in/d6nAEg8x This app was built as a solution to a problem reported on a large design (see: https://lnkd.in/dsZMe4ek) that consumed 230G memory. Also as per the original reporter: > We tried to extract this information with VCS and Verdi and it took over a day and a half. Will be interesting to see the metrics for this handy VPI app for the same/similar designs! Ajeetha Kumari Deepa Palaniappan Hemamalini Sundaram Ramakrishnan Kaliyaperumal #AsFigo #Opensource #SemiEDA #VPI #PLI
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#YoYoLint talk at #WOSET is now available online - in case you missed watching it live, here is a recorded version. Well done Saanvi Pradhan https://lnkd.in/eAY4qxWg
yoYoLint presentation at WOSET24 workshop
https://www.youtube.com/
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Indira Iyer Almeida Wladek Grabinski -a great Q&A session at #OpenPDK session at #WOSET Matthew Guthaus Sumanto Kar
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Nice acknowledgement from a budding engineer Saanvi Pradhan on her experience of working with AsFigo as remote intern from USA at today's #WOSET event. Thanks Matthew Guthaus for the platform!
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#BYOL is here to stay in the world of #SystemVerilog #lint Screenshot from today's #YoYoLint talk by Deepa Palaniappan Saanvi Pradhan Ajeetha Kumari #Opensource can now lead the commercial #lint tools especially in #UVMLint #DPILint #SVALint #PySlint - all tailored for specific use cases around various aspects of #SysetmVerilog #Testbench
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Some of the sample rules captured as #Lint rules for #SystemVerilog in #yoYoLint Nice job Deepa Palaniappan Saanvi Pradhan YosysHQ
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Life with and w/o #YoYoLint for a #SystemVerilog #RTL engineer Which error message is easier for you to fix? Ajeetha Kumari Ben Cohen Deepa Palaniappan Saanvi Pradhan Thanks Matthew Guthaus for the opportunity to share our work at #WOSET
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Martin Schoeberl presents a paper titled: The Educational RISC-V Microprocessor Wildcat at today's #WOSET workshop Interesting name for a #RISCV processor indeed RISC-V International > We named this processor Wildcat after a nice hiking area close to > where RISC-V instruction set was developed, at the University of California, Berkeley. #DTU #Denmark #Opensource DTU - Technical University of Denmark https://lnkd.in/eZ_PC-vZ
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#YoYoLint approach - at today's #WOSET Well done Deepa Palaniappan Saanvi Pradhan
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