Highlights from Alphawave Semi: Accelerating the Future
Welcome to the first in a new series of the Waverider Pulse, Alphawave Semi's quarterly newsletter.
In this new format, we will tackle a single topic in each issue, detailing whitepapers, blogs, technical articles and innovations relevant to the focus subject. This quarter, we examine chiplets and their die-to-die connectivity standard UCle.
Whitepaper: Will Chiplet Adoption Mimic IP Adoption?
Also in June, Alphawave Semi taped out the industry’s first off-the-shelf multi-protocol I/O connectivity chiplet based on TSMC’s 7nm process. The multi-standard I/O chiplet enables Ethernet, PCIe®, CXL®, plus UCIe™ and delivers a 1.6 Tbps throughput.
Webinar: Achieving HPC With Al Chiplets Through UCle D2D Interconnects
UCle die-to-die interconnects benefit from enhanced interoperability with low latencies and low power consumption levels. But what are the challenges and driving forces behind the development of disaggregated systems?
First Silicon-Proven 3nm, 24Gbps UCle IP Subsystem with TSMC CoWoS
This multi-protocol subsystem was created in collaboration with TSMC to meet the demands of hyperscale, HPC, and Al infrastructure. It delivers a bandwidth density of 8 Tbps/mm, plus a D2D data rate of 24 Gbps.
Podcast: Al Connectivity & Chiplet Innovation
Listen to Alphawave Semi's VP of IP Product Marketing & Management, Letizia Giuliano, discuss recent advances in Al connectivity, chiplet design and the importance of open standards. Recorded at the Al Hardware Summit - with Tech Arena's Allyson Klein.
If you would like to find out more about Alphawave Semi and how its custom silicon IP can help you, please get in touch, or visit our resources page for a wide range of white papers and information.
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