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Making chip design more accessible

I just verified my twin tee oscillator in silicon! This design was fabbed on Tiny Tapeout 7, which we just received from Efabless Corporation https://lnkd.in/dMwxmHsT This design uses a 'twin tee' filter in the feedback loop of an opamp. It was simulated to oscillate at 4.93MHz but I measured 4.67MHz - about 5% slower. Pretty close! Thanks to Alan Wolke (W2AEW) for the inspiration, Sai for the opamp design and Pat Deegan, KSC for the opamp layout. It was cool being able to reuse the open source silicon IP that other people have made! If you want to learn how to make your own custom chips, check out my courses here: https://lnkd.in/d-wSAgxi #ASIC #opensource #silicon #oscillator #verified

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Ugur Yegin

Senior Analog and Mixed Signal Design Engineer at Magics Instruments

3w

How does the phase noise look like?

Gustavo Hernández

Passionate about hardware. Mechatronics Engineering - CETYS University. Co-Founder @ CREEA. Summer 2024 Intern @ Intuitive.

3w

Matt Venn Look, I found this. From Rohde & Schwarz's Understanding Phase Noise Fundamentals

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