Learn about the pros and cons of hierarchical and flat design approaches for ASICs, and how to choose the best one for your project.

The right approach is to have a hierarchical design methodology for complex ASIC designs. Complex ASIC here refers to chips with millions of instances. Flat design methodology in intricate ASIC designs will result in high Turn Around Time (TAT), and the debugging process is also challenging as the entire design has to be evaluated every time. Whereas when the chip is split into modules and built, there is faster TAT, and the chip design process is less complex as the designer can focus on a particular module with fewer ports and instances. Static timing analysis and Physical verification are also less complex in a hierarchical approach. Once the hierarchical modules are built, they can be integrated as flat modules at the top level.

A hierarchical design allows for the modules to be re-used in multiple places, which helps with keeping the design simpler to handle and debug.

if the design is small, under 1M gates, its safe to do flat design, unless if you have multiple instance of the same module, relatively large, in this case, over 10k instances, then you can layout your module on its own, then drop it in the top level. For larger designs, your run time, analysis time, design complexity all goes down as you go from flat to hierarchical. You can also assign several engineers to work on smaller hierarchical designs, rather than having one person work on the full flat design.

What are the advantages and disadvantages of using hierarchical versus flat ASIC design approaches?

Application-Specific Integrated Circuits (ASICs) are custom-designed chips that perform specific functions with high efficiency, speed, and reliability. ASICs are widely used in various fields, such as telecommunications, automotive, aerospace, and biomedical engineering. However, designing and fabricating ASICs is a complex and costly process that involves several steps, such as logic synthesis, layout, routing, verification, and testing. One of the key decisions that ASIC designers have to make is whether to use a hierarchical or a flat approach for organizing their design.

1 Hierarchical Design

A hierarchical design approach divides the ASIC into smaller and simpler modules or blocks, each with its own functionality and interface, and then connects them by a top-level structure that defines the overall behavior and performance of the ASIC. This approach has several advantages, such as better modularity, reusability, and scalability of the design; reduced complexity and size of the design; facilitation of parallelism and teamwork; and improved quality and reliability of the design. However, it also has some disadvantages, such as requiring more planning and coordination; introducing more overhead and latency; and potentially limiting optimization and performance.

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Prasanna Siddireddy

Staff Engineer at Qualcomm
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A hierarchical design allows for the modules to be re-used in multiple places, which helps with keeping the design simpler to handle and debug.

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Azad DerBedrosian

Digital Design Engineer at NASA, Jet Propulsion Laboratory
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if the design is small, under 1M gates, its safe to do flat design, unless if you have multiple instance of the same module, relatively large, in this case, over 10k instances, then you can layout your module on its own, then drop it in the top level. For larger designs, your run time, analysis time, design complexity all goes down as you go from flat to hierarchical. You can also assign several engineers to work on smaller hierarchical designs, rather than having one person work on the full flat design.

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Abhishek Kumar Singh

Senior ASIC Power Engineer
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Smaller run times. A big help if you have big designs. Hier flow is a way faster, easier to debug and review and provide more control on design than flat runs.

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2 Flat Design

A flat design approach treats the ASIC as a single, monolithic entity, without any submodules or levels of hierarchy, and uses basic components like gates, transistors, and wires. This approach offers more flexibility and creativity for the designer to explore solutions and alternatives without restrictions. Additionally, it enables more optimization and performance, as well as reducing overhead and latency. However, it also increases complexity and size of the design, hinders parallelism and teamwork, and can compromise quality and reliability. The designer must manage and handle a large number of elements and interactions at the lowest level of detail, making it difficult to divide among different designers or teams. Furthermore, the design is harder to verify and test as a whole.

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3 Choosing the Right Approach

When it comes to ASICs, there is no one-size-fits-all approach. The right design depends on the project’s nature, scope, and requirements, as well as the availability and expertise of resources and the trade-offs and constraints of technology. Generally speaking, it is recommended to use a hierarchical design approach for large, complex, modular ASICs that require scalability, reusability, and reliability. On the other hand, a flat design approach is best for small, simple, unique ASICs that need flexibility, optimization, and speed. For medium-sized, moderate, and diverse ASICs that require a balance between benefits and drawbacks of both approaches, a hybrid or mixed design approach may be the best option.

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Samuel Tensingh

PhD Candidate @ The University of Sydney | Ex - ST Microelectronics | Ex - Broadcom | Digital IC Designer (RTL - GDS) | MIEAust | SMIEEE | Sr. MIES | FIETE | MEngNZ | MIET | MIED | MIEI
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The right approach is to have a hierarchical design methodology for complex ASIC designs. Complex ASIC here refers to chips with millions of instances. Flat design methodology in intricate ASIC designs will result in high Turn Around Time (TAT), and the debugging process is also challenging as the entire design has to be evaluated every time. Whereas when the chip is split into modules and built, there is faster TAT, and the chip design process is less complex as the designer can focus on a particular module with fewer ports and instances. Static timing analysis and Physical verification are also less complex in a hierarchical approach. Once the hierarchical modules are built, they can be integrated as flat modules at the top level.

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V Dasari

AI Enthusiast
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Our approach is a strategic synthesis of hierarchical and flat design principles, aiming to deliver solutions that are efficient, scalable, and robust. The commitment to adaptability, collaboration, and a deep understanding of project-specific requirements positions us to meet and exceed performance expectations, contributing to the success of our ASIC designs.

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4 Here’s what else to consider

This is a space to share examples, stories, or insights that don’t fit into any of the previous sections. What else would you like to add?

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Application-Specific Integrated Circuits (ASIC)

What are the advantages and disadvantages of using hierarchical versus flat ASIC design approaches?

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1 Hierarchical Design

2 Flat Design

3 Choosing the Right Approach

4 Here’s what else to consider

Application-Specific Integrated Circuits (ASIC)

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